In recent years, a phase-change memory (Phase-change Random Access Memory: PRAM) using a phase-change material such as chalcogenide has been proposed as a next-generation nonvolatile semiconductor memory. It is expected that, in the phase-change memory, writing/reading operations are performed as fast as those of a DRAM (Dynamic Random Access Memory) in spite of the nonvolatile, and a cell area can be reduced as small as that of a flash memory, and therefore, the phase-change memory has been expected as a next-generation nonvolatile memory.
The phase-change material used for the phase-change memory has already been used for an optical disk medium such as a DVD (Digital Versatile Disc). However, in the case of the DVD, a characteristic that the phase-change material has a different light reflectivity in an amorphous state and a crystalline state is used.
On the other hand, in the case of the phase-change memory, a characteristic that the phase-change material has a different electrical resistance in the amorphous state and the crystalline state by several digits is used, and the phase-change memory is a memory element in which the rewriting is electrically performed by carrying a current through a phase-change material film sandwiched by metal electrodes. A basic memory cell of the phase-change memory has a combined structure of a memory element (phase-change material film) and a selective element. In the phase-change memory, by applying the current from the selective element, the Joule heat is generated in the memory element, and a state of the memory element is changed to the crystalline state or the amorphous state, so that the information is memorized/stored. For the switching of the phase-change memory, that is the phase change of the phase-change material from the amorphous state to the crystalline state and the reverse change thereof, the Joule heat generated when a pulse voltage is applied to the phase-change material film is used. In other words, in the phase change (set operation/writing operation) from the amorphous state to the crystalline state which has a low resistance, a voltage causing a temperature which is equal to or higher than a crystallization temperature of the phase-change material and equal to or lower than a melting point thereof is applied for a relatively long period of time. On the other hand, in the phase change (reset operation/erasing operation) from the crystalline state to the amorphous state which has a high resistance, a short-pulse voltage causing a temperature which is equal to or higher than the melting point of the phase-change material is applied, and then, the current thereof is rapidly reduced to rapidly cool the phase-change material.
Generally, the resistivity of the memory element is changed by two to three digits by the phase changes. Therefore, in the phase change memory, a reading signal is largely varied depending on either the state is crystalline or amorphous, and therefore, the sense operation is easy. As microfabricating the phase-change memory, the current required for changing the state of the phase-change material is reduced, and therefore, the phase-change memory is suitable for the microfabrication in principle and has been actively studied.
As the selective element which selects a written, read, or erased phase-change memory among a plurality of phase-change memories, there is a polysilicon diode having a stacked structure of two or more polysilicon layers including a p-type semiconductor layer (hereinafter, simply referred to as “p-type layer”) and an n-type semiconductor layer (hereinafter, simply referred to as “n-type layer”). As a structure of the polysilicon diode which is the selective element of the phase-change memory, a column-shaped structure on a semiconductor substrate is known. In this case, compared to a case in which a transistor is formed on a main surface of the semiconductor substrate as the selective element, an integration degree of the phase-change memory can be improved. As the polysilicon diode which is the selective element, usage of a PN diode in which only the p-type layer and the n-type layer are stacked, a PIN diode in which an I layer (Intrinsic layer: intrinsic semiconductor layer, non-doped polysilicon layer) is formed between the p-type layer and the n-type layer, or others is considered.
Patent Document 1 (Japanese Patent Application Laid-Open Publication No. H06-260303) discloses a technique in which a resistive element is formed of a polysilicon film having a stacked structure in order to improve the temperature dependency of the resistivity of the resistive element formed on the main surface of the semiconductor substrate. The document describes to improve the temperature characteristic by applying the technique for improving the temperature dependency of the resistivity to a diode. However, the document does not describe to use a stacked polysilicon film in order to prevent generation of a leakage current in a reverse direction (reverse bias).
Patent Document 2 (Japanese Patent Application Laid-Open Publication No. H10-223377) discloses a technique in a stacked structure formed of a metal film and an organic layer configuring a light-emitting diode, the technique which prevents the organic layer formed in contact with the metal film from being damaged. The document describes that a resistance of polycrystalline ZnSe in a direction crossing a grain boundary is significantly higher than that in a direction along the grain boundary.
Patent Document 3 (Japanese Patent Application Laid-Open Publication No. H05-082825) discloses a technique which improves the dark current characteristic, optical sensitivity, and afterimage characteristic of a PIN-type or NIP-type photodiode. The document describes that a p-type layer formed of a polysilicon film is formed between another p-type layer and an I layer (Intrinsic layer: intrinsic semiconductor layer, non-doped polysilicon layer) made of polysilicon, and an n-type layer formed of a polysilicon film is formed between another n-type layer and the I layer, so that they configure a PIN-type photodiode. The document describes that, in this manner, the dark current can be suppressed by using the polysilicon film instead of the amorphous silicon film. Note that the document does not describe and teach to avoid the connection of the grain boundaries in the polysilicon film stacked between electrodes.
Patent Document 4 (Japanese Patent Application Laid-Open Publication No. 2009-218496) describes a PN junction diode in which the switching time is speeded up. The document describes that, by forming a p-type polysilicon film on an n−-type semiconductor layer which is a monocrystalline silicon layer, a concentration of holes injected from the p-type polysilicon film to the n−-type semiconductor layer in the application of a forward voltage can be suppressed because of the p-type polysilicon film having many crystal grain boundaries and small electron mobility.
Patent Document 5 (Japanese Patent Application Laid-Open Publication No. 2009-181971) discloses a technique which controls crystal grain boundaries of a diode by crystallizing a polysilicon film forming a diode of a phase-change memory by laser annealing. The document describes not to form the crystal grain boundaries in a diode formation region or describes to suppress variations in an off-leakage characteristic by orienting the crystal grain boundaries along an inter-electrode direction. However, the document does not describe to prevent the connection of the grain boundaries due to the orientation of the crystal grain boundaries.